Design Lab

About the lab

The Design Lab is a dedicated lab for undergraduate students who are undertaking Capstone project course. Basic equipment is available in the lab to assist students in completing their project.


Oscilloscopes, function generators, breadboards, multimeters, PCs

Courses related to the lab

KEEE4280: Capstone Project

Lab rules

  1. The laboratory is open for usage on working days from 8:30 to 17:30 starting from 31st October 2016.
  2. The application for using the lab during non-allowed time needs to be done by applying directly to the appointed technical staff (Mr. Hafizuddin) at least one day before.
  3. Students must record their attendance (record of entering and exiting the lab) in the log book provided in the lab.
  4. The lab is monitored by CCTV.


1st floor, Block Y (Engineering Summit), Department of Electrical Engineering, Faculty of Engineering

Opening hours

Monday – Thursday (9 am – 1 pm, 2 pm - 5 pm)

Friday (9 am – 12 pm, 3 pm - 5 pm)

Contact info

Tel: +6037967 2725 / 2715 / 5205


Photo Gallery



Lab Layout